SoC Digital PD Engineer - MCU | Timing, Power, SI

A semiconductor company is seeking a SoC Digital Physical Design Engineer based in Catania, Sicily. The successful candidate will have a deep understanding of physical design flow and timing closure, along with experience in power integrity analysis. Proficiency with EDA tools like Synopsys and Cadence is essential. Strong problem-solving skills and technical leadership experience are required to drive projects and mentor junior engineers. The salary range is between EUR 50,000 and 70,000.
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