Descrizione dell'offerta
Openchip & Software Technologies S.L. in Italy seeks a Principal Functional Verification Engineer to lead high-level modelling, UVM, and HW/SW co-debug across architecture, design, and software teams.
You will develop verification methodologies, environments, and test suites to ensure top quality of complex SoCs and IPs. The role requires 15+ years of verification experience, strong SystemVerilog/UVM and SystemC/C++ skills, and leadership to mentor teams.
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Candidatura e Ritorno (in fondo)
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