Descrizione dell'offerta
Experteer Italy seeks a senior FPGA/ASIC design engineer to drive digital design for FPGA-based prototypes and ASIC readiness. You will translate RTL into silicon, shape architectures, verify complex blocks, and ensure timing, area, and power targets across the product lifecycle.
You will interact with customers and stakeholders to align on functionality and protocols. The role requires deep knowledge of FPGA development flow, Verilog/SystemVerilog RTL, AXI/AHB interfaces, and experience with
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Candidatura e Ritorno (in fondo)
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