Senior ASIC RTL Design Engineer

Synopsys, Inc. · Milano, Lombardia, Italia · · 70€ - 90€


Descrizione dell'offerta

A leading semiconductor company in Milan is seeking an experienced Hardware Engineer to design and develop leading-edge semiconductor solutions. The ideal candidate will have over four years of experience in ASIC RTL design, a degree in Electrical Engineering or related fields, and proficiency in Verilog/SystemVerilog. This role involves mentoring teams and collaborating with cross-functional groups to drive innovation and efficiency in semiconductor products. Competitive salary and comprehensive benefits are offered.
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Candidatura e Ritorno (in fondo)