Principal Mixed-Signal Verification Lead – HV Gate Drivers

A leading semiconductor company in Milan is looking for a Principal AMS Verification Engineer to develop and implement verification plans for complex mixed-signal IC designs. This role requires over 8 years of experience in design verification, expertise in Verilog and SystemVerilog, and strong leadership qualities to mentor junior engineers. You will work collaboratively within a dynamic team, contribute to the continuous improvement of verification methodologies, and ensure the robustness of critical automotive and industrial products.
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