Principal AMS Verification Engineer

The Allegro team is united by a clear purpose—advancing technologies that make the world safer, more efficient, and more sustainable. With over 30 years of experience in semiconductor innovation, we bring that purpose to life across every part of the business—from breakthrough product development and customer success to how we show up for each other and the communities we serve.
The Opportunity
At Allegro MicroSystems, we are looking for a highly skilled and motivated Principal Mixed-Signal Design Verification Engineer to join our High Voltage Power Business Unit.
In this role, you will be a technical leader, playing a critical part in verifying our next-generation High Voltage Isolated Gate Drivers. You will have the opportunity to influence our verification methodologies, mentor talented engineers, and ensure the robustness and success of products that are vital to the automotive, industrial, and consumer markets. If you are an expert in mixed-signal verification and want to make a significant impact, this is the role for you.
What You’ll Do

• Develop and implement comprehensive verification plans for complex mixed-signal IC designs, covering both analog and digital functionality from end to end.
• Design and develop robust, reusable testbenches and verification infrastructure using industry-standard methodologies (UVM/OVM/VMM).
• Write and execute targeted tests to rigorously verify design functionality, performance, and compliance with all specifications, ensuring first-pass silicon success.
• Work closely with design engineers to analyze, debug, and resolve challenging design issues at the system level.
• Contribute to the continuous improvement of our verification methodologies and processes, bringing in new ideas and best practices.
• Mentor junior and senior verification engineers, fostering their technical growth and contributing to a culture of excellence within the team.
  

Who You Are

• You hold a Master’s degree in Electronics Engineering, Computer Engineering, or a related field.
• You have 8+ years of deep experience in mixed-signal IC design verification.
• You are an expert in Verilog, SystemVerilog, and scripting languages (Python, Perl, TCL).
• You possess a strong understanding of both analog and digital circuit design principles.
• You have extensive experience with mixed-signal simulation environments and simulators (e.g., Cadence Virtuoso, Spectre, Siemens Symphony).
• You are a natural leader and mentor, with a passion for sharing your knowledge and developing talent.
• You have excellent communication, teamwork, and problem-solving skills, with the ability to drive technical discussions in a collaborative environment.
  

Why Allegro?
Join Allegro and become part of a team where your contributions truly matter.
We foster a culture of Real Innovation , empowering you to push boundaries, develop cutting-edge solutions, and drive continuous improvement.
Your work will create a Real Impact by solving complex real-world challenges that fuel our success and shape the future of technology.
You’ll experience Real Connection , collaborating with talented colleagues around the globe in an environment built on trust, respect, and a shared purpose.