Mixed Signal Verification Engineer

Allegro MicroSystems · Varese, Italia ·


Descrizione dell'offerta

The Allegro team is united by a clear purpose—advancing technologies that make the world safer, more efficient, and more sustainable. With over 30 years of experience in semiconductor innovation, we bring that purpose to life across every part of the business—from breakthrough product development and customer success to how we show up for each other and the communities we serve.
The Opportunity
We are seeking a Mixed Signal Verification Engineer to join our High Voltage Business Unit, focusing on our Isolated Gate Drivers Product Line. The team develops isolated gate drivers that include an optimized power transfer system from primary to secondary. As a Mixed-Signal Verification Engineer, you will play a critical role in ensuring the quality and reliability of our products, guaranteeing they meet the rigorous demands of the automotive and industrial markets. This is your chance to make a tangible impact on the future of e-mobility and clean energy.
What You’ll Do

  • Work under supervision of a senior AMS verification engineer, reviewing the schematic and specification to understand main functionality and requirement
  • Create and maintain advanced testbenches using industry-standard languages like SystemVerilog and Verilog-AMS.
  • Develop high-level behavioral models for analog blocks to enable efficient system-level verification.
  • Run mixed-signal simulations to validate circuit performance and functionality against design specifications.
  • Collaborate closely with design, systems, and applications engineers to identify, debug, and resolve issues throughout the product development cycle.
  • Participate in design and verification reviews, providing valuable feedback to improve product quality.
  • Enhance our verification methodologies by developing and deploying reusable verification components and automated scripts.
Who You Are
  • You have ideally +1 years of experience in mixed-signal IC verification or analog design.
  • You hold a Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related discipline.
  • You have a strong understanding of both analog and digital circuit fundamentals.
  • You have basic knowledge in hardware description languages (e.g., Verilog, SystemVerilog, Verilog-AMS) and have experience with verification methodologies (UVM is a plus).
  • You have hands-on experience with mixed-signal simulation environments and simulators (e.g., Cadence Virtuoso, Spectre, Siemens Symphony).
  • You possess basic scripting skills (e.g., Python, Perl, Tcl, SHELL/BASH script) for automation and data analysis.
  • Use of Versioning tools (e.g. GIT, SOS)
  • You are a natural problem-solver with excellent debugging skills and a keen attention to detail.
  • You have strong communication and teamwork skills, with a passion for collaborating in a global, fast-paced environment.
Why Allegro?
Join Allegro and become part of a team where your contributions truly matter.
We foster a culture of Real Innovation , empowering you to push boundaries, develop cutting-edge solutions, and drive continuous improvement.
Your work will create a Real Impact by solving complex real-world challenges that fuel our success and shape the future of technology.
You’ll experience Real Connection , collaborating with talented colleagues around the globe in an environment built on trust, respect, and a shared purpose.

Candidatura e Ritorno (in fondo)