Analog IC Design Engineer - SERDES

I am recruiting for a Senior Analog IC Design Engineer on behalf of my client, a growing technology company developing next-generation solutions for high-performance data communication. The position is focused on high-speed Phase Locked Loop design and integrated power management within advanced CMOS nodes.

The Senior Analog IC Design Engineer will contribute to cutting-edge developments in energy-efficient interconnects.

Key responsibilities:

-Collaborate with the engineering team define and optimise SerDes architectures

-Design core SerDes IP blocks including amplifiers, PLLs, DLLs, equalizers, and samplers

-Develop supporting analog circuits like biasing, regulators, ADCs, and DACs

-Own verification plans and support bring-up through to product release

Requirements:

- Over 5 years of experience and a relevant degree

- Proven SerDes design expertise at 12nm or below, over 20Gbps+

-Strong EDA tool proficiency (Cadence, Spectre, Calibre, etc.)

-Deep analog design knowledge, including SI/PI considerations

To be considered for this opportunity, you will need to have experience in high-speed designs.

For the right individual, remote working is available.

This is an excellent opportunity for a Senior Analog IC Design Engineer looking to work on novel technologies in a collaborative and forward-looking environment.